Every year at SEMICON West, in addition to taking in keynotes and technology sessions, I like to catch up with semiconductor suppliers to find out about any significant news, their latest offerings and how they are enabling next-generation manufacturing. Here are this year’s highlights.
One of the big stories of the week was the launch of UnitySC, a subsidiary of Fogale Nanotech, the result of Fogale’s recent acquisition of Altatech. I attended the launch party extravaganza at the Four Seasons, which featured the grand spectacle of ice carvers revealing the new company name in a giant block of ice (Figure 1). According to Gilles Fresquet, CEO, Unity, and Tim Anderson, Business Development Director, the new name is derived from the core competency of the combined companies, which is based one the unified yield equation, relying on parametric and D-zero data to provide a total solution for advanced process control using a predictive model.
Acquiring all the assets of Altatech from Soitec added defect inspection and metrology using AOI and 3D imaging to Fogale’s already robust capabilities in microscopy temporal-mode interferometry and spectrometry, for inspection “all-the-way-around-and-through” advanced packages, explained Anderson. The full portfolio, which consisted of process control, metrology and defect detection for 3D TSVs, and micro bumps, now includes edge inspection and defect detection for the advanced wafer level packages, particularly fan-out-wafer-level (FOWLP) packaging.
The latest technical advancement in the works is phase-shift deflectometry, noted Fresquet, developed for slip-line detection. With nanometer sensitivity to the topography on the wafer surface, they are reportedly able to highlight slip lines on the top and backside of a wafer in a few seconds. Look for a deeper dive into Unity’s offerings in future posts on 3D inCites.
I stopped in for a visit with Thomas Uhrmann and Hermann Waltl at EV Group’s booth and learned about two new tool introductions that will enable high-volume manufacturing (HVM) of heterogeneous integration, 3D integration, and advanced packaging. The first is a second permanent bonding platform, the ComBond, which joins the well-established Gemini platform to augment EVG’s permanent bonding portfolio.
What’s different about ComBond is that it’s an end-to-end high vacuum cluster tool with an optical and electrical interface the bonds at room temperature (or near it), and works without oxide on pretty much any substrate material, not just Si. Because the process takes place under high vacuum, materials don’t re-oxidize. It’s the ideal solution for bonding fancy, engineered substrate materials, such as monocrystalline silicon carbide (SiC) on polycrystalline SiC, explained Uhrmann. Another example is bonding for innovative MEMS processes using Aluminum (Al) bonding rather than gold. Al is highly reactive and is used for hermetic sealing in MEMS, and achieves the same quality as gold at a much lower cost. Because Al oxidizes, bonding in the vacuum cluster prevents re-oxidation. Additionally, attempting these bonds in conventional bonding platforms is impossible because of the high temperatures used, which kills the device, explained Uhrmann.
According to Uhrmann, what determines whether to go with the ComBond or Gemini platform depends on several things: whether adhesive is involved, and whether vacuum is required. If the process requires adhesives, but not high vacuum processes, or does not need an oxide free bond interface – the Gemini platform is the established market leader.
EVG’s second announcement was the launch of the EVG50, an automated, stand-alone metrology system for high-volume manufacturing that leverages the capabilities of its in-line metrology module, and complements the EVG-NT measurement system. Uhrmann explained the tool leverages a multi-sensor measurement mount and can be customized for different thickness ranges and substrates to provide versatility for measurement at different process steps in the value chain that have the potential for re-work, such as measuring total thickness variation for temporary bond/debond processes, as well as photoresist thickness in lithography steps, and wafer thinning processes. You can read more about it here.
Next up for me was a visit with EAG Laboratories, a behind-the-scenes provider of highly sophisticated materials characterization services for a host of markets, including the semiconductor industry, and the “best-kept secret in Silicon Valley for 40 years,” according to Siddhartha Kadia, president and CEO, EAG. The company was rebranded just two weeks ago from its original incarnation as Evans Analytics Group, after acquiring a number of companies to incorporate test, failure analysis, reliability, and microscopy capabilities, to bring a combined 1000 years of experience together under one roof. “No other business or organization that has the depth, breadth, or years of experience as a team as EAG has in materials characterization,” says Kadia.
To get an idea of what EAG brings (or has brought) to the semiconductor industry, and more specifically 3D integration, I spoke with Aram Sarkissian, who heads up the microelectronics Test and Engineering division of EAG.
Sarkissian explained that EAG supports the semiconductor industry throughout its continuum, from new product introduction (NPI), through qualification, and sustaining manufacturing by providing data for quality control, yield enhancement, hind-cycle, and improvement. “The bulk of our work is in NPI, from early debugging and early qualification through manufacturing,” he said. “We have a full ATE (automated test equipment) floor that we perform test flows from pilot to full production.”
With regard to 3D technologies, Sarkissian said that although EAG worked behind-the-scenes, it was at the forefront of TSV and bump development and successful integration of these technologies that enabled 3D to be possible. He added that as stacked die reaches full-scale production, particularly for memory applications, he sees opportunity in helping to develop heterogeneous integration solutions, as it is clear electronics will proliferate into system-level integration, and engineers will be looking at how to do heterogeneous integration for the first time in different consumer electronics markets.
“Our role is to really help customers get to where they are going with what they are designing to overcome technology challenges,” said Amanda Halford, chief commercial officer at EAG. For example, the Internet of Things, from wearable devices, medical devices, and computing technologies, are the perfect fit for EAG’s expertise across different disciplines coming together to troubleshoot as we progress further with development.
On to the Rudolph Technologies booth, where I talked to Elvino da Silveira about the company’s latest addition to its inspection capabilities, thanks to the acquisition of Beltronics. Dubbed Clearfind Technology, this illumination technique uses fluorescent detection to identify organic defects, such as resist residue on high-end organic packages such as FOWLP.
The point of Clearfind is to optimize the process flow. It allows you to proactively identify issues with the process in addition to finding bad die, explained da Silveira. The benefit of detecting hard-to-find resist residue is that you have the opportunity to do a clean step before moving to the next process step, for improved reliability.
“We’ve always had dark field and bright field capabilities; adding another illumination capability enhances our inspection arsenal.” said da Silveira. Clearfind detects anything that fluoresces on pads, bumps, and the devices themselves. He said that the company plans to release the technology as an integral part of the inspection head in one or two product platforms targeted to volume manufacturing. He said they know there is a demand for the capability, as they worked with customers to determined what they needed before going through the effort of developing the technology.
From the MEMS side of the tracks, I caught up with Tony McKie, MEMSSTAR, to get his perspective on what’s happening in the MEMS equipment market. As memsstar refurbishes and remanufactures semiconductor equipment as well as etch and deposition tools specifically for MEMS manufacturing, his pulse was a good one to take.
McKie pointed out that MEMS doesn’t follow the same trends as semiconductor manufacturing. With regard to the IoT, he said that it’s not really about CMOS, but more about MEMS and is driven by the apps. It’s also not driven by Si, but by other substrate materials used to manufacture MEMS and sensors.
On the topic of the 200mm fab renaissance, and its impact on memsstar, McKie noted that in Europe at least, the IoT is breathing new life into 200mm fabs. 90% of Europe is working on IoT applications, mostly power devices, and MEMS. “Not many companies are driving 300mm and 450mm,” he noted. “For an equipment provider, that creates interesting challenges.” For example, MEMS for consumer applications need to be made at a reasonable price point.
Producing MEMS at 300mm is more expensive than 200mm because huge volumes aren’t required. For a company like memsstar, this is a good market opportunity, says McKie, because it has a basis in semiconductor equipment. “The goal was to develop MEMS equipment for applications with the same performance as semiconductor equipment (n terms of single wafer processing, process control, and reliability),” said McKie. “Were we are and where the industry is going are finally coming together.”
For the past 10 years, my briefing with Ultratech has taken place on the last day of the show. For eight of those years, I had a standing appointment with Manish Ranjan, who has now moved on to Lam Research. For the past two years, I’ve met with Rezwan Lateef, vice president and general manager at Ultratech, who hailed previously from Tel-NEXX Systems. (One of the things I like best about this industry is how it’s more about the people than the companies, as I get to talk to the same people year after year, regardless of what logo their brandishing.)
In any case, as my briefings wrap up with Ultratech, it seems only fitting to wrap up this post with Lateef’s observations. In terms of advanced packaging technologies, Lateef says this is the year of the FOWLP, calling it a game-changer, evidenced by TSMCs jumping onto the bandwagon with InFO, and the intention to become the first SiP foundry. “It’s driven a substantial part of our business this year,” he said, noting that FOWLP is dominating foundry and IDMs, and “fanning out” (pun intended) to the OSATs as a significant growth vehicle.
According to Lateef, Ultratech owns more than 80% market share of tools sold for advanced packaging lithography processes, such as for Cu pillar fabrication and redistribution layer (RDL) patterning. Advanced FOWLP technologies like InFO, which has multiple layers of RDL, is pushing line/space to 2µm. Additionally, in comparison to conventional FOWLP, which involves one die and one RDL layer, InFO package-on-package (InFO PoP) can have multiple die with memory stacked on top.
Going down to 2µm line/space represents a 10x reduction in size with compared to mainstream FOWLP. “They’re not getting that in the front-end,” he said. “The cost of investment is in the back-end of the line. There’s lots of excitement in FOWLP. What we are doing at Ultratech is directly impacting the future of the smartphone.”
That seems like a good note to end on, until next year! ~ F.v.T